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rggen 0.29.0

RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate source code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM RAL model, C header file, Wiki documents, from human readable register map specifications.

Gemfile:
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instalar:
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Versões:

  1. 0.35.2 July 21, 2025 (16 KB)
  2. 0.35.1 June 01, 2025 (16 KB)
  3. 0.35.0 February 19, 2025 (16 KB)
  4. 0.34.0 January 23, 2025 (16 KB)
  5. 0.33.4 November 28, 2024 (16 KB)
  6. 0.29.0 January 02, 2023 (15,5 KB)
Mostrar todas as versões (74)

Runtime Dependencies (6):

rggen-c-header ~> 0.3.0
rggen-core ~> 0.29.0
rggen-default-register-map ~> 0.29.0
rggen-markdown ~> 0.24.0
rggen-spreadsheet-loader ~> 0.24.0
rggen-systemverilog ~> 0.29.0

Development Dependencies (1):

bundler >= 0
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Donos:

Pushed by:

Autores:

  • Taichi Ishitani

SHA 256 checksum:

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Total de downloads 116.900

Desta versão 887

Versão lançada:

Licença:

MIT

Versão Requerida do Ruby: >= 2.7

New versions require MFA: true

Version published with MFA: true

Links:

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